发明名称 COMPUTER SYSTEM MEMORY CONTROLLER
摘要 <p>PURPOSE: To reduce power consumption by providing a power control register, an AND gate, an intermittent current circuit, etc., and generating a power control signal so as to control supplying power corresponding to an accessing state to a cell array. CONSTITUTION: A static RAM(SRAM) 27 as the main part of a memory controller 17 consists of the cell array 29, a bit line bias/pull up circuit 31 and a detection amplifier 33. Then power is continuously supplied for the array 29 by a power circuit 41 and supplied for the amplifier 33 and the circuit 31 through the AND gate 45, the power control register 49, the power control signal 47 and the circuit 41. Namely corresponding to the accessing state to the array 29, the instruction of a microprocessor makes the register 49 generate the signal 47 and the power of the circuit 41 is connected to the intermittent current circuit 43 through the gate 45 or turned off. Thereby the power consumption of SRAM 27 constituting the controller 17 is saved.</p>
申请公布号 JPH02277111(A) 申请公布日期 1990.11.13
申请号 JP19900004827 申请日期 1990.01.12
申请人 SANYO ELECTRIC CO LTD;OAK TECHNOL INC 发明人 UIRIAMU UONGU;SHIRIPON SURITANYARATANA;MATSUI MITSURU
分类号 G06F1/26;G06F1/32;G06F12/00;G06F12/06 主分类号 G06F1/26
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