发明名称 METHOD AND DEVICE FOR GENERATING TEST PATTERN OF LOGIC CIRCUIT
摘要 PURPOSE:To enable test pattern generation by multiple-path activating method which is free from hazard intervention by making variation signals correspond to different signal values according to whether or not the output waveforms depend upon the variation appearance order when the plural variation signals appear at the input of an element. CONSTITUTION:The output waveforms of the variation signals are made to correspond to different signal values according to whether output waveforms depend upon the appearance order of the signals and when they do not depend upon the appearance order, the waveform of one variation signal has a signal value corresponding to a 0/1 inverted waveform and input fault information is limited only when it is determined only by the final waveform of the variation signal, thereby generating a fault propagation path. When the output waveforms depend upon the input variation signal appearance order, on the other hand, a hazard is generated and when no, no hazard is generated, so different signal values are made to correspond to both the cases, thereby deciding whether or not the hazard is generated. In the latter case, the signal values are set to output signal values according to the polarity of the element and then the output signal values are determined with the corresponding signal values of input waveforms which do not depend upon the time. Consequently, test pattern generation and simulation which detect many faults in summer by a multiple-path activating method without any hazard intervention are enabled.
申请公布号 JPH02276980(A) 申请公布日期 1990.11.13
申请号 JP19890097325 申请日期 1989.04.19
申请人 HITACHI LTD 发明人 IKEDA KOJI;HATAKEYAMA KAZUMI;HAYASHI TERUMINE
分类号 G01R31/3183;G01R31/28;G06F11/22;G06F17/50;H03K19/00 主分类号 G01R31/3183
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