发明名称 REGISTER BANK CIRCUIT
摘要 PURPOSE:To eliminate the need for the selection of the memories repetitively until the bank numbers are switched when the accesses are given to the registers included in a bank by using a bank number decoding signal and selecting all registers equivalent to one bank. CONSTITUTION:A data bus interface DBI 61 transfers the instructions, the data, etc., between a program memory and a data memory via a data bus DB 69. In this case, the necessary address information is produced by an address generating unit AGEN 62 and supplied via an address bus interface ABI 63 and an address bus AB 68. The instructions read out of the memories are held by an instruction buffer IBUF 64 and then sent successively to an instruction decoder IDEC 65 to be decoded there. A control signal generating unit CONT 66 produces the control signal of each part necessary for the execution of the decoded instructions. A REGISTER BANK block 51 is the assembly of registers turned into banks that is used by a programmer.
申请公布号 JPH02277125(A) 申请公布日期 1990.11.13
申请号 JP19900003400 申请日期 1990.01.12
申请人 TOSHIBA CORP;TOSHIBA MICRO ELECTRON KK 发明人 ITO HIROSHI;FUKUOKA HIROSHI;SHINOHARA MAKOTO;YOSHIDA KAZUYOSHI
分类号 G06F7/00 主分类号 G06F7/00
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