| 摘要 |
PURPOSE:To make a filter of an FSX demodulating circuit into an IC with a high precision by reducing the number of filters of an SCF(switched capacitor filter) by clock switching. CONSTITUTION:Since a clock frequency is stepwise superposed on the output of the SCF, the offset due to an influence of an operational amplifier of the SCF is eliminated by a buffer 22, a capacitor 23, and a resistance 24 after the output passes a low pass filter consisting of a resistance 20 and a capacitor 21. The clock of the SCF is obtained by an oscillation frequency dividing circuit 30 having two frequency division ratios and a quartz oscillator 29, and frequency division ratios give a divided frequency suitable for a high group or a low group by H/L input. For example, when a ratio of the center frequency of band pass to the clock frequency of the SCF is 58, 62.64kHz which is 58 times as high as 1080Hz and 101.5kHz which is 58 times as high as 1750Hz are given in CCITT standards, and the quartz oscillation frequency is set to 1MHz and the frequency division ratio is set to 16.10, thereby obtaining an about objective clock frequency. Thus, one SCF is enough, and the SCF is used for the high group as well as the low group with a simple logic circuit. |
