发明名称 OUTPUT VOLTAGE CONTROL CIRCUIT IN SWITCHED CAPACITOR SYSTEM
摘要 PURPOSE:To obtain high step-up voltage without adding elements such as capacitors, switches, etc., by performing charging control from a capacitor in the initial stage provided on an input voltage terminal side to the capacitors in sequence and by charging the capacitor of the next stage with the voltage by the sum of the voltage of charged capacitors. CONSTITUTION:In a timing 1 switches S1 and S2 are turned ON, while other switches are OFF. At this moment, a capacitor C1 is connected to an input voltage terminal 1 and charged with input voltage V1. When the charging to the capacitor C1 is finished, it will be the next timing 2. At this moment, switches S3, S4 and S5 are turned ON and others are OFF. A capacitor C2 is then charged with the voltage 2V1 which is the sum of the input voltage V1 and the voltage V1 of the charged capacitor C1. Thus the capacitor is charged with the charging voltage stepped up to a value twice as high as that of the last stage one by one in sequence and gets to the timing N, where output voltage V2=2N<-1>.V1 is obtained.
申请公布号 JPH02276420(A) 申请公布日期 1990.11.13
申请号 JP19890078463 申请日期 1989.03.31
申请人 NEC CORP 发明人 HARANO HIROSHI
分类号 H01G4/38;H02J1/00 主分类号 H01G4/38
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