| 摘要 |
PURPOSE:To contrive an enlargement of freedom in the design of a chip by a method wherein a two-layer wiring is provided through a patterning through hole. CONSTITUTION:A first insulating film 3 is formed on a semiconductor substrate 1 and on the surface of an insulating film 2 and grooves 5 having a width two times narrower or smaller than the film thickness of a conductor film are formed in the film 3. The conductor film 6 is buried in these grooves 5. Moreover, the conductor film 6, which is not lead out to the outside, and a conductive film 8 are electrically insulated from each other by a second insulating film 7, the conductor film 6, which is led out to the outside, and the film 8 come into contact conductively to each other through the film 8 buried in a patterning through hole 11 and the film 8 is covered with a third insulating film 9 having an electrode window 10 for external lead-out use. Accordingly, as the effect of a stress, which exerts on a buried wiring layer under an electrode pad at the time of bonding, is small, there is little trouble due to the failure of an interlayer film and the pad can be provided not only on the peripheral part of a chip but at an arbitrary place. In such a way, the effective utilization of the area of the chip and the high-density arrangement of electrode pads become possible. |
