| 摘要 |
PURPOSE:To analyze the result of logical simulation while confirming logic expressed by function description by directly displaying the status value of the logical simulation result to hardware description language(HDL). CONSTITUTION:The system is provided with a describing position recognizing means 5 for forming a correspondence table 6 between all function signal names and their describing positions prescribed in the HDL 1, a value/position corresponding means 7 for inputting all the function signal names outputted from a logical simulator 2, the status values of all the function signal names which are the simulation result 4 and the correspondence table 6 obtained by the means 5 and forming a correspondence table 8 between the simulation values of all the function signal names and their describing positions, and a display means 9 for inputting information 11 specifying simulation time and displaying the simulation value obtained at the specified simulation time on the position of the function signal name described in the HDL 1 displayed on a display screen 10. Consequently the simulation result can be efficiently analyzed while alternately observing the HDL description and the simulation result. |
