发明名称 Porous floating gate vertical mosfet device with programmable analog memory
摘要 An electrically programmable, erasable, read-only memory is comprised of an array of vertical porous floating gate MOSFET structures in a layer of a-Si with parallel X and parallel Y conductors on opposite sides of the a-Si layer functioning as source and drain electrodes. The floating gate of each vertical MOSFET structure consists of a plurality of electrically insulated metallic particles embedded in the a-Si layer between said source and said drain electrodes with the metallic particles adjacent to the source electrodes. The insulation between the metallic particles and the a-Si material is thick enough to prevent tunneling of electrons but the insulation between the particles and the source electrode is thinner to allow tunneling of electrons at a predetermined threshold voltage to store a charge in the porous floating gate. Alternatively, the metal particles may be gathered into one insulated toroidal gate which controls current through a-Si in the center of the toroidal gate. Analog or binary information may be stored in the vertical MOSFET structures by application of high voltage. Stored information may be read without erasing the stored information by application of a low voltage, and information may be erased by application of a high reverse voltage.
申请公布号 US4969021(A) 申请公布日期 1990.11.06
申请号 US19890364114 申请日期 1989.06.12
申请人 CALIFORNIA INSTITUTE OF TECHNOLOGY 发明人 THAKOOR, ANILKUMAR P.;MOOPENN, ALEXANDER W.;LAMBE, JOHN J.
分类号 H01L29/423;H01L29/49;H01L29/51;H01L29/786;H01L29/788 主分类号 H01L29/423
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