| 摘要 |
The Delta-Sigma modulator for digitally encoding an analogue input signal includes a clock for generating a timing waveform having a frequency higher than the highest frequency component of an analogue input signal. A sampling circuit, including a switching capacitance, stores charge representative of instantaneous amplitude values of the input signal. An integrator operatives as a low-pass filter, is responsive to the output of the sampling circuit. A one-bit A to D converter, clocked by the timing waveform, provides two complementary outputs in response to the instantaneous polarity of the integrator output. A reference circuit selectively applies a charging voltage to the integrator.
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