<p>The demodulation circuit comprises a counting circuit (11) which detects from the outputs of an error correction circuit (2) how many samples are interpolated continuously and two AND circuits (9,10) which perform AND operation of the output of the circuit (11) and a mute signal that is generated when it is out of synchronism with the output. When the samples are to be interpolated continuously more than a given number m, a voice difference signal is muted by the mute signal so that no signal is produced that seriously deteriorates the sound quality. @(20pp Dwg.No.1/6)@.</p>
申请公布号
EP0394491(A1)
申请公布日期
1990.10.31
申请号
EP19890911613
申请日期
1989.10.24
申请人
MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD.;NIPPON HOSO KYOKAI