| 摘要 |
<p>An analog signal delay circuit includes a frequency modulation circuit (120) for pulse frequency-modulating an analog input signal, a delay circuit (138) using a CMOS gate for delaying an output signal of the frequency modulation circuit (120) and a frequency demodulation circuit (154) for frequency-demodulating an output signal of the delay circuit. The frequency modulation circuit (120) and the frequency demodulation circuit (154) comprise CMOS gate circuit means (124-128,156-162) connected in series in a loop in plural stages. The analog signal delay circuit comprises further a control voltage generation means (118) for generating a control voltage (Vc1,Vc2) being supplied to the CMOS gate circuits of said frequency modulation circuit (120), signal delay circuit (138) and frequency demodulation circuit (154) as its operation power voltage. According to this analog delay circuit, a high resolution is realized since no clock is used for delaying of an analog signal and moreover, a continuous control of the delay time is available by controlling the power voltage applied to the CMOS gate.</p> |
