发明名称 HANDOTAIKIOKUSOCHI
摘要 <p>A semiconductor memory device provided with first and second bit lines, each of which is connected to a memory cell comprising a nonvolatile transistor and a dummy cell comprising a nonvolatile transistor. The first and second bit lines are respectively connected to high voltage generators which are applied at the time of data programming. At the time of data reading, data-detecting and storing means comprising a flip-flop circuit detects data, while amplifying a potential difference between the first and second bit lines. At the time of data writing, the data detecting and storing means temporarily stores data in accordance with the contents of externally supplied writing data. A first switching transistor is provided between the first data input-output node of the data-detecting and storing means and the first bit line. The second switching transistor is connected between the second data input-output node of the data-detecting and storing means and second bit line. The paired switching transistors are controlled in accordance with the operation mode of the memory device.</p>
申请公布号 JPH0249515(B2) 申请公布日期 1990.10.30
申请号 JP19840197925 申请日期 1984.09.21
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 MYAMOTO JUNICHI;TSUJIMOTO JUNICHI
分类号 G11C17/00;G11C16/02;G11C16/06;G11C16/28 主分类号 G11C17/00
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