| 摘要 |
PURPOSE:To transmit communication data again even if a hard error exists in a transfer line, a receiving side register or a transmitting side register by providing the error correction mechanism of one bit on the data transfer line. CONSTITUTION:In the case where data is transferred from a transmitting side processor 1 to a receiving side processor 2, the data is set in the transmitting register 11. The output of the register 11 is selected by a multiplexer 12, and is set in the receiving register 21. In usual processing, the output data of the register 21 is sent to a receiving side data processing part 20. Simultaneously, a check circuit 25 checks the output data of the multiplexer 22. When an error is detected, the suppression of data processing and the start of retrial are informed to the data processing part 20 through a signal line 204. When the error is informed, a retry control part 15 informs the data processing part 10 at a transmitting side of the retrial. |
