| 摘要 |
<p>PURPOSE:To produce a sure reset signal free from the mixture of an error signal by outputting the output signal of a one-shot trigger circuit which outputs a signal when a prescribed time lapses after the input of a holding signal as a reset signal. CONSTITUTION:When a power supply Vcc is applied and the voltage of the Vcc exceeds the reference voltage Vref, a power voltage detecting circuit 1 works and the detecting signal has gradually higher levels. Then the detecting signal of a high level is supplied to a one-shot trigger circuit 2. At the same time, a holding signal S4 of a high level that has the prescribed time width is supplied to the circuit 2. Meanwhile a reset signal S3 holds a low level. Thus it is possible to avoid such a failure where a microprocessor, etc., starts its working in an incomplete state to cause a runaway or sometimes to destroy the memory contents with the supply of the signal S3.</p> |
