| 摘要 |
PURPOSE:To perform the switching of a frequency at high speed and stably by performing the correction of preset frequency error by integrating the output of a compensation loop filter, and adding a signal corresponding to a stationary phase error on the output of the loop filter of a phase locked loop. CONSTITUTION:The PLL is comprised of a voltage addition circuit 106 which adds the output of a D/A conversion circuit 107 and the control signal of the loop filter 104 and outputs a corrected control voltage, and the compensation loop filter 105 which integrates the stationary phase error in the stationary state of the PLL and inputs it to the voltage addition circuit 106 is attached. By integrating and holding an error appearing at the stationary state of the compensation loop filter 105, a correction signal which sets the error at zero is inputted to the voltage addition circuit 108 at least when the frequency is switched. Therefore, it is possible to dispense with the integral action time of the loop filter required for the synchronization of the frequency to correct the error when the frequency is switched, and to accelerate the switching of the frequency. |
