Floating-point processor having pre-adjusted exponent bias for multiplication and division.

摘要

A floating-point arithmetic unit includes an exponent unit for biased exponents. Combinatorial bias-adjust logic (324) removes the bias from one operand exponent before the two operand exponents are added together in adder (322) for a multiply operation, and inserts a bias into one exponent before the exponents are subtracted by the adder for a divide operation.