| 摘要 |
PURPOSE:To reduce the occuplying area of a complementary MIS circuit device by forming one conductive type low impurity density layer on the other conductive type high impurity and forming the other conductive type insular region surrounded by one condutive type high impurity density annular region in the one conductive type layer, thereby eliminating a parasitic effect. CONSTITUTION:A P<-> type layer 23 of reverse conductive type low impurity density is, for example, formed through an N<+> type layer 22 of high impurity density on an N type semicondutor substrate 21. A P type region 11 of higher impurity density than a P<-> type layer 23 is formed on part of the layer 23, and an N channel MIST-M1 having an N<+> type source 12, a drain 13, a gate insulating layer 14 and a gate electrode 15 is formed on the region 11. A reverse conductive type N type region 32 to a P type annular region 31 surrounded by the region 31 is formed on the other part of the layer 23, and a P channel MIST-M2 having a P type source 16, a drain 17, a gate insulating layer 18 and a gate electrode 19 is formed thereon. In this manner, a C-MIS having no parasitic effect and reduced size can be obtained. |
