| 摘要 |
PURPOSE:To prevent a clock width which controls a computer system from expanding by controlling the processing of an adder in each part with the longest calculating time of each part obtained by dividing the whole number, and controlling the processing of the adder in each part. CONSTITUTION:An addition control system consisting of four 16-bit adders 10a to 10d, three latches 11a to 11c controlled by a clock signal 12, and an output control circuit 13 is provided. It divides the numbers X and Y of 64 bits into the numbers X4, X3, X2, X1; Y4, Y3, Y2 and Y1 of 16 bits, respectively, and they are processed in units of 16 bits by the adders 10d, 10c, 10b and 10a, respectively. Further the processing of the adder in each part is controlled as the longest time of each part obtained by dividing the whole number as the clock width. Thus the clock width to control the computer system can be prevented from expanding. |
