| 摘要 |
PURPOSE:To execute a process from program development to provision of the program at one system by providing at least two evaluation chips or the like provided with a function displaying a content of a built-in register. CONSTITUTION:The evaluation chip 1 is a debugging CPU and connecting terminals with peripheral circuits for debug are provided in addition to a terminal 1a. The evaluation chip 2 is mounted as a piggy back type and controlled by a program memory 4. The evaluation chip 1 and the piggy back 3 are connected by a signal line 5. A program to be debugged is written in a program memory 6. The program to be debugged is inputted sequentially to the evaluation chip 1 based on the address designation from the evaluation chip 1 to execute the program. |
