发明名称 SEQUENTRAL READING ACCESS FOR SERIES MEMORY HAVING STARTING ADDRESS DETERMINED BY USERS
摘要 <p>PURPOSE: To attain series reading memory access having a random start address by responding so that data is successively read from a register in a memory array when data is read from a register corresponding to an address and generating an incremental signal. CONSTITUTION: A writing instruction is clock-inputted to an instruction register 4 in series, successively data of 16 bits to be written in a specified address is clock-inputted to a data shift register 5. And data is written in a selected storing register in an EEPROM array, and transferred in parallel to a specified storing register in the array 2 through data in a driver 6A. A reading instruction loads an address of a memory register to be read from an instruction register 4 in an 8 bits address register 7, and it is transferred in parallel to the data shift register 5 through a sense amplifier 6, successively clock-outputted in series to a data output pin DO. Thereby, an address is successively, that is in turn, increased.</p>
申请公布号 JPH02257494(A) 申请公布日期 1990.10.18
申请号 JP19890017851 申请日期 1989.01.30
申请人 NATL SEMICONDUCTOR CORP <NS> 发明人 BIKURAMU KOUSHIKU;SUDAKAARU BODEYU;ERUROI EMU RUSERO
分类号 G11C17/00;G11C7/00;G11C8/04;G11C16/02;G11C19/00 主分类号 G11C17/00
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