发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To decrease the occupying area of a chip, by using only two wires for an input gate at reception side, through the use of an inverter circuit for a push- pull type integrated circuit. CONSTITUTION:A transmission two input NOR gate G1 consists of driving MOS transistors (TRs) TRQ1 and Q2 and load MOS TRs TRT1 and T2, and an inverter INV1 consisting of driving MOS TRQ21 and load MOS TRs T21 and T22 is provided near the gate G1. A signal line l1 of the TRs Q1 and Q2 being the output side of the gate G1 is connected to the gate of the TRQ21 of the INV1, and the gate of the TRQ1 and Q2 being the input terminal of the gate G1 is connected to the gate of the TRT21 and T22 of the INV1 via driving lines l2 and l3. The gate G1 and the signal line l3 connected to the signal line l1 of the INV1 are connected to the gate of the driving MOSTRQ11 at reception side, a load driving line ld from the INV1 is connected to the gate of the load MOS TRT12 at reception side, and the jumpers to a reception side 2 input NOR gate G3 are limited to only two.
申请公布号 JPS583326(A) 申请公布日期 1983.01.10
申请号 JP19810100507 申请日期 1981.06.30
申请人 FUJITSU KK 发明人 NISHIUCHI KOUICHI;TAKAHASHI HIROMASA
分类号 H03K19/0944 主分类号 H03K19/0944
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