发明名称 STEREO DEMODULATING CIRCUIT
摘要 PURPOSE:To reduce crosstalk components, by multiplying the rectangular wave signals which contain a DC component set to a stereo composite signal and are synchronized with the subcarrier frequency. CONSTITUTION:A stereo composite signal Ei is applied to the operational amplifiers OP1 and OP2, and at the same time a clock signal of 38kHz is applied to the analog switches S2 and S3. At the same time, the clock signal is applied to the analog switches S1 and S4 through an NOT circuit. The gains of the amplifiers OP1 and OP2 vary in accordance with the switches S1-S4 which are turned on and off by the clock signal. Thus an output is obtained by multiplying the signal Ei by the subcarrier frequency. A high band component of the above-mentioned output is removed through a low pass filter, and the L and R components free from the crosstalk are obtained.
申请公布号 JPS583434(A) 申请公布日期 1983.01.10
申请号 JP19810101729 申请日期 1981.06.30
申请人 NIPPON GAKKI SEIZO KK 发明人 KIMURA SHIGENOBU
分类号 H04B1/16;H04H40/45;H04H40/63 主分类号 H04B1/16
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