| 摘要 |
PURPOSE:To make data communication stable by providing a power averaging means, timer means and comparing means to output the activation signal of a resynchronization sequence, detecting a tendency before an automatic equalizer is completely diverged and activating the resynchronization sequence. CONSTITUTION:A square-law average circuit 2 receives an error signal (a) from an automatic equalizer 1, computes the square-law of the signal, further calculates an average value and outputs a power average signal (b). A timer circuit 3 outputs a timer pulse signal (c) to a comparator circuit 4 after a fixed period when the above mentioned error power average signal (b) exceeds a prescribed value (x). When this timer pulse signal (c) is inputted, the comparator circuit 4 compares the error power average signal (b) with the prescribed value (x). When the error power average signal (b) exceeds the prescribed value (x), a resynchronization request signal (d) is outputted as the activation signal of the resynchronization sequence. Accordingly, received data including the large quantity of error bits are prevented from being outputted to a terminal. |
