| 摘要 |
1. A capacitance-multiplying circuit characterized by the fact that it comprises, between an input terminal (A) and an output terminal (S), a first circuit (1) constituted by a parallel connected capacitor (C1) and resistor (R1) and a second circuit constituted by a series connected capacitive impedance (2) and resistive impedance (3), and an amplifier (11), the capacitive impedance being connected to the input terminal and the resistive impedance being connected to ground, the amplifier circuit being connected firstly to a point (B) common to the capacitive impedance and to the resistive impedance, and secondly to the output terminal (S). |
