发明名称 |
Method for producing semiconductor integrated circuit device |
摘要 |
A method for producing a memory LSI having in its peripheral circuitry an MISFET of LDD structure and a vertical type bipolar transistor is disclosed. More particularly, an impurity for forming a low impurity concentration region of the said MISFET of LDD structure is introduced sideways of an emitter-base junction of the bipolar transistor. By the introduction of the said impurity, an effective impurity concentration near the base surface is reduced and the cut-off frequency of the bipolar transistor is improved.
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申请公布号 |
US4962052(A) |
申请公布日期 |
1990.10.09 |
申请号 |
US19900478050 |
申请日期 |
1990.02.07 |
申请人 |
HITACHI, LTD. |
发明人 |
ASAYAMA, KYOICHIRO;MIYAZAWA, HIROYUKI;KOBAYASHI, YUTAKA;YUKUTAKE, SEIGOU |
分类号 |
H01L21/331;H01L21/8249;H01L27/06;H01L27/10;H01L27/105;H01L29/10;H01L29/73;H01L29/732 |
主分类号 |
H01L21/331 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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