发明名称 IN-CIRCUIT EMULATOR DEVICE
摘要 PURPOSE:To design high performance hardware and software by displaying output signals outputted from both of an instruction execution time measuring circuit and a bus occupation ratio measuring circuit on a display device through an analytical display program. CONSTITUTION:The instruction execution time measuring circuit 3 measures the number of instructions to be executed by a CPU 2 and the execution time of the CPU 2 for a target hardware 1 to be developed or evaluated. On the other hand, the length and interval of a bus cycle are measured by the bus occupation ratio measuring circuit 4 and the display device 5 to measure the bus occupation ratio. The CPU 2 executes a program to be developed or evaluated and acts on the target hardware 1. Thereby, the circuit 3 measures the number of instruction executions per unit time and the instruction execution time, and the circuit 4 measures the using capacity, i.e. the bus occupation ratio, in each bus unit. An analyzed result is displayed on the display device 5 through an analyzed result display program based upon the two measured values, so that the performance of the hardware and software can be easily obtained.
申请公布号 JPH02252031(A) 申请公布日期 1990.10.09
申请号 JP19890073264 申请日期 1989.03.24
申请人 TOKYO DENSHI SEKKEI KK 发明人 TACHIBANA ATSUHIRO
分类号 G06F11/34;G06F9/455;G06F11/22 主分类号 G06F11/34
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