发明名称 |
INTEGRATED CIRCUIT TIMER WITH MULTIPLE CHANNEL AND DEDICATED SERVICE PROCESSOR |
摘要 |
<p>PURPOSE: To reduce the load of a CPU by providing equal functions for all the timer channels of a multi-timer channel so as to improve the performance of a timer subsystem. CONSTITUTION: A timer 15 uses clocks from two clock sources of a timer counting registers #1(TCRE1) and #2(TCRE2) as reference. TCRE1 is clocked by an internal clock source related with the system clock of a microcomputer 10. On the other hand, TCRE2 is clocked by an external source supplied from a pin. The timer 15 is provided with sixteen timer channels with an equal function CH. 0 to 15 and connected with a CPU 11 through an internal module bus(IMB) 12. The CPU 11 reads and writes from/in a timer register positioned at a memory location to interact with the timer 15. Thereby the load of the CPU is reduced.</p> |
申请公布号 |
JPH02252008(A) |
申请公布日期 |
1990.10.09 |
申请号 |
JP19890210828 |
申请日期 |
1989.08.17 |
申请人 |
MOTOROLA INC |
发明人 |
BURAIAN EFU UIRUKII;BAANON BII GOORAA;SUTANREI II GUROUBUSU;JIYON JIEI BEGURIKA |
分类号 |
G04G3/00;G04G99/00;G06F1/14;G06F15/16;G06F15/177 |
主分类号 |
G04G3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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