| 摘要 |
An apparatus and method for calibrating an interleaved digitizer includes a system oscillator for generating a master clock signal and two or more cascaded phase shifting circuits for producing clock signals that are phase shifted copies of the master clock signal. The calibrator further includes two or more A/D converters for digitizing the master clock signal at time intervals provided by the phase shifted clock signals to produce a digitized output. The digitized output is then stored in a memory. Once stored, the digitized output is compared to predetermined reference levels and the phase shift of the phase shifting circuits is appropriately adjusted as a function of the difference between the stored digitized output and the predetermined reference levels. After the phase shift of each of the phase shifting circuits has been adjusted the digitizer input is switched from digitizing the master clock signal to digitizing an analog input signal, thus converting the calibrator into an accurately calibrated digitizing system.
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