发明名称 ACTIVE MATRIX ARRAY
摘要 <p>PURPOSE:To eliminate uncorrectable flaws and to prevent gate signal lines of lead-out lines from short-circuiting adjacently by forming two thin film transistors(TFT) for one picture element electrode and connecting the gate terminals of the TFTs to gate signal lines which do not adjoin to each other. CONSTITUTION:The gate terminals of TFTs TM11 to TMmn adjoining to respective picture electrodes P11 to Pmn are connected to gate signal lines G1 to G5 having the intervals by one line respectively. Further, even-numbered gate lines of G1 to G5 are led out to the right side and the odd-numbered gate lines are led out to the left side of the substrate; and lead-out electrodes A1 to A5 for inputting a signal from a gate driving IC are formed at one-terminal sides. Thus, the gate signal lines connected to the gate terminals of two TFTs are separated to reduce uncorrectable defects and the lead-out lines are led out zigzag to reduce short circuits between adjacent lead-out lines, as well.</p>
申请公布号 JPH02251822(A) 申请公布日期 1990.10.09
申请号 JP19890072409 申请日期 1989.03.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKAHARA HIROSHI
分类号 G02F1/136;G02F1/1368;H01L29/78;H01L29/786 主分类号 G02F1/136
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