发明名称 CIRCUIT TO AUTOMATICALLY POWER DOWN A CMOS DEVICE WHICH IS LATCHED UP
摘要 An integrated circuit protection device for resetting an integrated circuit when latch-up occurs. A switching means is connected in series with a current path to selectively control the flow of current through an integrated circuit. A voltage comparison means monitors changes in voltage which correspond to change in the currant flowing through the integrated circuit. The voltage comparison means operates cooperatively with a storage means to provide an output to control the switching switching means causes it to restrict current flow through the integrated circuit.
申请公布号 CA2011287(A1) 申请公布日期 1990.10.07
申请号 CA19902011287 申请日期 1990.03.01
申请人 HONEYWELL INC. 发明人 RATZ, JAMES W.
分类号 G05F3/20;(IPC1-7):H03K17/56 主分类号 G05F3/20
代理机构 代理人
主权项
地址