| 摘要 |
PURPOSE:To reduce the area of a cell as far as possible without being accompanied by any large change of pattern by forming a memory cell transistor in which a source region is brought into contact electrically with one of oppositely faced contact holes and a drain region is brought into electrical contact with the other. CONSTITUTION:Contact holes C1-C4 are formed at each position of a plurality of crosswise continuous virtural rhombic apices respectively, cells CEL01, CEL02, CEL11, CEL12, CEL21, CEL22, CEL31, CEL32 are shaped in regions corresponding to all virtual rhombic sides, and a bit line BL0 is formed. According to the constitution, the area of a cell can be reduced to two thirds, and the density of integration can be brought to one and a half times. Consequently, the area of the cell can be diminished as far as possible by using a lithographic technique without largely changing a pattern. |
