发明名称 |
Dynamic RAM having a full size dummy cell |
摘要 |
A dynamic RAM, in which the difference between a data signal level from one of a pair of complementary data lines coupled to a memory cell and a reference potential level of the other of the complementary data lines is differentially amplified by a sense amplifier. The data line taking the reference potential level is coupled to the other data line through a switch element so that its data line capacitance is increased. As a result, the reference potential level is held at a relatively stable level irrespective of a leakage current such as that caused by alpha particles. This construction makes it possible to use a full-size dummy cell because the capacitance of the data lines which takes the reference potential level is increased. The reference potential level achieved by the use of the full-size dummy cell is made relatively accurate because of the relative accuracy between the capacitances of the memory cells and the capacitance of the full-size dummy cell.
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申请公布号 |
US4961166(A) |
申请公布日期 |
1990.10.02 |
申请号 |
US19850729859 |
申请日期 |
1985.05.02 |
申请人 |
HITACHI, LTD. |
发明人 |
SATO, KATSUYUKI;YANAGISAWA, KAZUMASA;ONO, KUNIO |
分类号 |
G11C11/4096;G11C11/4099 |
主分类号 |
G11C11/4096 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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