发明名称 |
Apparatus for generation of scan control signals for initialization and diagnosis of circuitry in a computer |
摘要 |
A scan testable circuit in a computer system is controlled by using a single scan clock and a fixed delay circuit to realize the required scan clocks and a required scan mode enable signal. The multiple signals are generated from a subset of signals supplied to the scan control signal generation circuit. System data and scan data are routed through a multiplexer to test or initialize lines and circuitry. A scan control signal generation circuit according to the invention has the advantage of eliminating as excess a scan mode enable signal originating elsewhere in the computer system, thereby eliminating unneeded signal traces while minimizing the number of pins required for this function. In a first embodiment, a scan mode enable signal is generated from one of two scan clocks. In a second embodiment, both scan clocks and the scan mode enable signal are generated from a single source clock.
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申请公布号 |
US4961013(A) |
申请公布日期 |
1990.10.02 |
申请号 |
US19890423306 |
申请日期 |
1989.10.18 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
OBERMEYER, JR., JOHN R.;SHELTON, JOHN F.;WILLIAMSON, DONALD A. |
分类号 |
G01R31/3185;H03K5/15 |
主分类号 |
G01R31/3185 |
代理机构 |
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主权项 |
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地址 |
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