发明名称 Method for self-aligned manufacture of contacts between interconnects contained in wiring levels arranged above one another in an integrated circuit
摘要 For self-aligned manufacture of contacts referred to as vias between interconnects that are contained in wiring levels arranged above one another in an integrated circuit, a pillar technique is employed where the contacts are produced before the deposition of an inter-metal dielectric to produce the pillar, a layer structure is produced that contains at least one metal layer for the lower wiring level and at least one conductive layer for the contacts. The longitudinal expanse of the contact is defined by a mask that reliably overlaps the desired width of the lower interconnect. The transversal expanse of the contact is defined by the mask needed for producing the lower interconnect. The contacts and the lower interconnects are produced by step-by-step etching.
申请公布号 US4960489(A) 申请公布日期 1990.10.02
申请号 US19890451987 申请日期 1989.12.18
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 ROESKA, GUENTHER;WINNERL, JOSEF;NEPPL, FRANZ
分类号 H01L21/3213;H01L21/768 主分类号 H01L21/3213
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