RESISTANCE MEANS, LOGIC CIRCUIT, INPUT CIRCUIT, FUSE-BLOWING CIRCUIT, DRIVE CIRCUIT, POWER-SUPPLY CIRCUIT AND ELECTROSTATIC PROTECTIVE CIRCUIT; SEMICONDUCTOR STORAGE DEVICE CONTAINING THEM, AND ITS LAYOUT SYSTEM AND TEST SYSTEM

摘要

PURPOSE:To realize a high integration of a memory array and to reduce a signal- transfer delay time in a peripheral circuit by a method wherein the memory array of a semiconductor device is constituted fundamentally of a dynamic memory cell and its peripheral circuit is constituted fundamentally of a Bi-CMOS logic gate circuit. CONSTITUTION:This Bi-CMOS dynamic RAM is provided with 8 memory mats MAT0 to MAT7. Dynamic memory cells of 132X516 pieces, i.e., 68112 pieces, are arranged in a grid shape at intersecting points of word lines and complementary bit lines. The memory mats MAT0 to MAT7 are started selectively when a corresponding selection signal AS0L, AS0R, AS1L or AS1R is at a high level, and autonomously and independently executes a series of operations which are required to select a word line and a data line or to drive a sense amplifier. As a result, a selective operation of the Bi-CMOS dynamic RAM is simplified and is executed at high speed; a storage capacity of the memory mats can be formed as a unit by making use of the capacity as an expansion unit.