发明名称 METHOD OF FORMING HETERO EPITAXIAL STRUCTURE AND INTEGRATED CIRCUIT
摘要 PURPOSE: To activate hetero-epitaxial growth and an implantation part by a method wherein, in a cap layer on a hetero-epitaxial layer of a second material, the second material is balanced with lattice, and in the upmost layer of a third material on the cap layer, the cap layer is balanced with lattice. CONSTITUTION: A hetero-epitaxial structure 100 contains a silicon substrate 102, a GaAs buffer layer 104, an Alx Ga1-x As layer 106, an AlAs layer 108 and a GaAs layer 110. An active device like MOSFET 112 and JFET can be manufactured in the GaAs layer 110, or can be grown so as to contain both of heterojunction bipolar and MOS manufactured in the layer 110 together with the layer 110 and GaAs and Alx Ga1-x As layer.
申请公布号 JPH02244729(A) 申请公布日期 1990.09.28
申请号 JP19890281611 申请日期 1989.10.27
申请人 TEXAS INSTR INC <TI> 发明人 YUNGUUCHIYUNGU KAO;DONARUDO ERU PURAMUTON
分类号 H01L29/73;H01L21/20;H01L21/203;H01L21/324;H01L21/331;H01L21/338;H01L29/205;H01L29/737;H01L29/812 主分类号 H01L29/73
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