| 摘要 |
<p>PURPOSE:To correct the fluctuation of the potential of a bit line, to prevent the decision of a sense amplifier from being delayed and to execute the operation at a high speed by grounding the selection transistor side of a memory cell train through a potential correction transistor, and connecting the gate and the drain of its potential correction transistor. CONSTITUTION:The selection transistor T1-Tn sides of memory cell trains L1-Ln are grounded through potential correction transistors 20, and the gate and the drain of its potential correction transistors 20. Accordingly, when the potential of a bit line connected to memory cells S1-Sm exceeds a prescribed level, the potential transistors 20 connected to the selection transistor T1-Tn sides of the memory cell trains L1-Ln are turned on, the potential of the bit line is lowered to a level corresponding to a threshold voltage of the potential correction transistor 20, and the potential of the bit line is corrected. In such a way, the potential of the bit line is corrected and it does not become higher than necessary, therefore, a delay of a read-out operation of a memory device can be prevented, and the operation is stabilized and executed at a high speed.</p> |
