发明名称 Method and device for conditioning the clock signal for a clock-controlled circuit arrangement
摘要 In order to increase the noise immunity and the reliability in the operation of clock-controlled circuit arrangements in a method for conditioning the clock signal for a clock-controlled circuit arrangement, particularly for microcomputers, in which a clock signal is generated which has a predetermined duty ratio and a predetermined clock frequency and is supplied to the clock-controlled circuit arrangement, the duty ratio generated and/or the clock frequency are checked for deviations from predetermined values and when the duty ratio and/or the clock frequency deviate from the predetermined values, the duty ratio and/or the clock frequency is changed and when predetermined deviations of the duty ratio and/or of the clock frequency exist, an output signal is generated which arrests the clock-controlled circuit arrangement in a predetermined state or controls an emergency operating function.
申请公布号 DE3909200(A1) 申请公布日期 1990.09.27
申请号 DE19893909200 申请日期 1989.03.21
申请人 HELLA KG HUECK & CO, 4780 LIPPSTADT, DE 发明人 SCHMIDT, FRANZ-JOSEF, 4796 SALZKOTTEN, DE
分类号 H03K3/017;H03K3/03;H03L7/08 主分类号 H03K3/017
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