发明名称 INTERPOLATION SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To form an excellent interpolation signal with simple constitution depending on logical discrimination of an amplitude of a signal by comparing amplitudes of plural vicinity picture element signals and using a prescribed order number of signals from the larger or smaller order as an interpolation signal. CONSTITUTION:The quantity of A signal of an input section of a 1st delay circuit 202 and that of a signal of an output section are discriminated by a sequence discrimination section 205 and the quantity of a signal of an input section of a 2nd delay circuit 203 and that of the amplitude of a signal of the output section are discriminated by a sequence discrimination section 206. Then a signal obtained at a minimum value output terminal of the discrimination sections 205, 206 is fed to other sequence discrimination section 207, and the quantity of the amplitude of a minimum value output of the sequence discrimination section 205 and that of the sequence discrimination section 206 are discriminated by the sequence discrimination section 207. Then a signal obtained at a maximum value output terminal of the sequence discrimination section 207 is used as an output signal of an interpolation filter and the signal is fed to a 2nd fixed contact 210b of a changeover switch 210 via a time axis compression circuit 208 and a 3rd delay circuit 209.
申请公布号 JPH02243078(A) 申请公布日期 1990.09.27
申请号 JP19890058260 申请日期 1989.03.10
申请人 SONY CORP 发明人 TANAKA YUTAKA
分类号 H04N5/94;H04N7/01;H04N7/46;H04N11/20 主分类号 H04N5/94
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