| 摘要 |
<p>PURPOSE:To enable efficient processing by making an address wherein input data is stored coincident with an address wherein data after discrete cosine transformation DC arithmetic processing is stored. CONSTITUTION:A dual port memory 12 is provided with storage systems of two systems and each storage part is provided with a work area in addition to a storage area for input data. Then read addresses of data to be processed which are read out of the respective storage parts at the same time and write addresses of arithmetic data obtained by adder subtracters 19 and 20 from those data to be processed are enabled to be changed and while the arithmetic data are rearranged, DCT arithmetic operation is carried out. Consequently, the arithmetic data after the DCT arithmetic processing can be written in the same addresses as the addresses where the input data are stored and can be read out without being rearranged to realize the efficient processing such as the processing time can be shortened.</p> |
