| 摘要 |
<p>PURPOSE:To execute an exact data access in the course of counting by allowing a time counting operation to wait in the course of data access. CONSTITUTION:At the time of access of data, an output of an RSFF 1 is turned on by outputting a 1HzW signal. Thereafter, when a 1Hz signal is inputted, an RSFF 2 is turned on through an AND gate 3, and an output of an OR gate 4 remains in an H level, therefore, even if the 1Hz signal rises, a counter 5 is not brought to count-up. In this state, when a data access is ended and a 1Hz signal is outputted, the RSFF 1 and the RSFF 2 are reset, and the output of the OR gate 4 becomes an L level, therefore, the counter 5 is brought to count-up. When the output of the RSFF 2 is turned off, the counter is brought to count-up by a fall of the 1Hz signal.</p> |
