发明名称 RECEIVING CIRCUIT OF COMMUNICATION EQUIPMENT
摘要 PURPOSE:To reduce power consumption in intermittent reception, and to reduce noises during a telephone call, by changing filter constants of an LPF inserted between the voltage-controlled oscillator of a PLL synthesizer circuit and a phase comparator. CONSTITUTION:An LPF2 is provided with two kinds of time constant circuits, which are switched by a time constant switching circuit 21. Namely, the transistor TR of the circuit 21 is turned off during intermittent reception to obtain an increased division ratio (R2+R'2)/(R1+R2+R'2) at this time, so the loop gain of a high frequency range is increased, obtaining a widened pull-in range. As a result, a lock-up time is shortened to accelerate reduction of power consumption. In a calling state wherein a reception detecting circuit 20 generates a detection signal, on the other hand, the TR is turned on to form a short circuit across a resistance R'2, obtaining a decreased division ratio R2/(R1+R2) at this time. Therefore, the loop gain is decreased to narrow down the pull-in range, and consequently less-ripple, stable oscillation is obtained.
申请公布号 JPS5812435(A) 申请公布日期 1983.01.24
申请号 JP19810111201 申请日期 1981.07.15
申请人 MATSUSHITA DENKO KK 发明人 MATSUO MASAYUKI;ABIKO TOSHIO;TATEZUKI KUNIHARU
分类号 H04B1/26;H03L7/093;H04B7/24 主分类号 H04B1/26
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