| 摘要 |
In a semiconductor integrated logic circuit, latch circuits are provided to hold the input signal supplied to a random logic circuit just before an operation mode is switched from a normal operation mode to a test operation mode. During the test operation mode, the latched signals are continued to be supplied to random logic circuit so that the operation condition of a internal circuit of the random logic circuit is maintained as it is. Therefore, when the circuit is returned from the test operation mode to the normal operation mode, the circuit operation of the internal circuit of the random logic circuit continuing from the circuit operation in the previous normal operation condition can be obtained. |
