| 摘要 |
PURPOSE: To test simply and accurately irrespective of a testing direction of a signal by a method in which continuous parallel first and second check words are respectively compared by a space division multiplex switching matrix and error display is performed when incogruous to each other. CONSTITUTION: In a switching cell S of [(n+m)×m]pieces of matrix arrangement, a space division multiplex switching matrix K is formed, and a built-in gate is controlled by input lines D1 to Dn and C1 to Cm so that a switch S is selected. Comparing with the switch S selecting a bit of continuous parallel first and second words from an output decorder 0D and an input decorder ED, an error signal 1 is output onto corresponding output lines Y1 to Ym via a clock circuit CL when incongruous to each other. With this structure, a switching effort is reduced irrespective of a progress direction of a signal without awaiting a reception completion of all bits, and it is possible to test simply, accurately and promptly.
|
