发明名称
摘要 PURPOSE:To contrive reduction in wiring resistance of a power source wire by a method wherein the third layer of power source wire having the wiring width wider than that of the first and the second layer power source wires, is arranged in paralle with the first layer power source wire, and a connecting work is performed between each layer of power source wire of the same potential. CONSTITUTION:The third layer (top layer) power source ires VSS2 and VDD3 are arranged in the extending direction of a basic cell column 13, and the second layer power source wires VSS2 and VDD2 are arranged in lattice form intersecting at right angle with the third layer power source wires. Also, the lowest layer (the first layer) power source wire is arranged in the extending direction of the column 13 under the power source wires VSS3 and VDD3. Besides, the second layer power source wire is connected to the third layer power source wire at the point of intersection of these wires through a penetrated hole. Besides, the abovementioned connection, the first layer power source wire and the third layer power source wire are connected maintaining the prescribed interval. Moreover, the wiring width of the third layer power source wire is formed wider than that of the first and the second power source wires. As a result. there is no possibility of generation of a disconnection of wire even when there is a stepping, and the power source impedance on the wires extended to the main power source wire can be lowered.
申请公布号 JPH0241908(B2) 申请公布日期 1990.09.19
申请号 JP19840274504 申请日期 1984.12.28
申请人 发明人
分类号 H01L21/822;H01L21/3205;H01L21/82;H01L23/52;H01L27/04;H01L27/118 主分类号 H01L21/822
代理机构 代理人
主权项
地址