发明名称 DISCRETE COSINE ARITHMETIC UNIT
摘要 <p>PURPOSE:To improve the efficiency by providing an address conversion means, and generating an address from which an arithmetic result data written in a data storage means with respect to the same input address as the input address at data readout in the order of input addresses at data readout. CONSTITUTION:An address conversion means 23 is provided to generate an address reading out the arithmetic resulting data written in a data storage means 12 with respect to the same input address as the input address at data readout in the order of input address. Thus, the arithmetic resulting data is read in the order of the initial data arrangement without rearranging the data after the discrete cosine transformation arithmetic processing and the efficient processing is attained.</p>
申请公布号 JPH02237374(A) 申请公布日期 1990.09.19
申请号 JP19890058588 申请日期 1989.03.10
申请人 CASIO COMPUT CO LTD 发明人 ENDO TAKAHISA;IWAMOTO TETSURO
分类号 H04N1/415;G06F17/14 主分类号 H04N1/415
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