| 摘要 |
<p>The invention relates to a circuit composition for realizing high speed operation of semiconductor memory device such as nibble mode, which comprises plural latch circuits (9-12) for writing data, a circuit for storing the write history of data into the plural latch circuits and controlling the writing action of data into plural memory cells on the basis of the result thereof, and a circuit for writing in batch the written data latched in the plural latch circuits into the plural memory cells during the inactive period of the reference clock signal for driving the memory device. By thus composing, not only data reading but also data writing may be done at high speed, so that the high speed action of the memory may be realized on the whole.</p> |
