发明名称 |
Semiconductor memory device with error check and correcting function |
摘要 |
An EEPROM having an ECC circuit further comprises a counter circuit. The ECC circuit checks and corrects bit errors included in data read out from a memory cell array. In addition, the ECC circuit generates a predetermined signal every time it corrects a bit error. The counter circuit counts a predetermined signal generated from the ECC circuit. |
申请公布号 |
US4958352(A) |
申请公布日期 |
1990.09.18 |
申请号 |
US19880253001 |
申请日期 |
1988.10.04 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
NOGUCHI, KENJI;TOYAMA, TSUYOSHI;KOBAYASHI, SHINICHI;ANDOH, NOBUAKI;KOHDA, KENJI |
分类号 |
G11C29/00;G06F11/00;G06F11/10;G06F12/16;G11C29/42 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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