| 摘要 |
PURPOSE:To prevent malfunction of an input circuit due to noise and to improve the noise eliminating capability by detecting the occurrence of a change in an input signal while a sampling clock phi is inactive and inhibiting the production of an output signal of an input circuit when an input signal is changed. CONSTITUTION:After an H level of an input signal IN3 is latched at the trailing edge of the clock phi for a period of T11, when the input signal IN3 is changed to an L level again when the clock phi is at an L level, an output of an AND circuit 11 goes to an H level for the period of T11. Since an output of the AND circuit 11 connects to a set input of an RS flip-flop 12, the RS flip-flop 12, the RS flip-flop 12 is set for the period of T11, and an inverse of Q output D8 goes to an L level. Thus, the inverse of Q output D8 of the RS flip-flop 12 goes to an L level for a period of T11-T13 and malfunction due to noise generated synchronously with the trailing of the clock does not take place. |
