READ CONTROL CIRCUIT AND LSI FOR REGISTER

摘要

PURPOSE:To prevent a malfunction due to the change of data in a read mode and to reduce the software load by adding a latch circuit to an output stage of a register and holding automatically the value of the register in the latch circuit in accordance with the read signal received from a microprocessor. CONSTITUTION:The address signal received from a microprocessor 2 selects a register 3 and the read strobe received from the microprocessor 2 is activated. Thus a read signal 43 is activated in the timing different from the timing where the register 3 is changed. On the other hand, a latch control signal 42 is inactivated and the signal produced right before the signal 43 is activated is stored in a latch circuit 6. An output gate 7 is kept in an ON state as long as the signal 43 is active. Thus the unfixed data is never outputted to the microprocessor 2 since the value of the circuit 6 is held. Thus it is possible to prevent a malfunction due to the change of data in a read mode and to reduce the software load.